Best-in-class Arm® AMBA® ATP Verification IP (VIP) for your IP, SoC, and system-level design testing.

Cadence provides a comprehensive solution to address Arm® AMBA® Adaptive Traffic Profiles (ATP) specification. The ATP functionality is implemented as a stand-alone SystemVerilog UVM layer fully compatible with Cadence AHB, ACE/AXI, and CHI Verification IPs.

The ATP SV UVM layer includes ATP virtual sequences as well as virtual FIFO fill and drain logic which allows users to manage the requested traffic bandwidth. The ATP UVM layer allows users to specify desired traffic profile properties in the terms defined in AMBA Adaptive Traffic Profiles (ATP) specification. The ATP UVM layer resides over Cadence AMBA VIPs and automatically translates traffic profiles defined by users to the corresponding AHB, AXI, ACE, or CHI protocol traffic.

Supported specification: AMBA® Adaptive Traffic Profiles Specification Issue A.

AMBA ATP diagram

Product Highlights

  • The SV UVM layer provides support of Arm AMBA Adaptive Traffic Profiles (ATP) specification
  • Allows users to define desired traffic profiles in the terms defined in AMBA Adaptive Traffic Profiles (ATP) specification
  • Allows users to write test sequences to co-ordinate the ATP traffic across multiple interfaces
  • Built-in FIFO logic allows users to manage the desired traffic bandwidth

Key Features

The following table describes key features from the specifications that are implemented in the VIP:

Feature Name

Description

Definition of Adaptive Traffic Profiles

  • Definition of write and read traffic profiles using the ATP specification terminology

Timing Control

  • Support of primary and secondary timing parameters

FIFO Model

  • Built-in FIFO logic for managing the traffic bandwidth

Synchronization Between Traffic Profiles

  • Built-in mechanism to coordinate traffic profiles issued from multiple interfaces

Supported Protocols

  • AMBA AHB, AXI, ACE, and CHI protocols

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VIP 附带一个场景测试集合,可轻松评估和部署 VIP

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