Overview

Scalable Power-Efficient Processor Platform

The Cadence Tensilica Xtensa LX processor platform offers the most versatility by enabling the configuration of several pre-defined processor elements and extending the architecture by creating entirely new instructions and hardware execution units as well as custom memory paths and data I/O paths. Cadence is pleased to introduce Xtensa LX8, the latest generation of the Tensilica Xtensa LX processor platform. The Xtensa LX8 platform provides key features, such as a flexible L2 memory option, geared toward improving system-level performance by as much as 50% versus earlier generation processors. The Xtensa LX8 processor can be used for a wide range of applications by configuring it into a tiny controller, a high-performance DSP engine, or anything in between.

Key Benefits

Innovation and Differentiation

Create unique differentiated hardware tailored to specific application requirements for optimal performance and energy efficiency

Future-Proof Your Design

Programming flexibility for OTA updates to enable innovation that results in frequent algorithm updates

Unmatched Ease of Extensibility

Increased computational and I/O performance by executing multiple independent instructions in parallel and using wide I/O datapaths for virtually unlimited bandwidth

Features

  • Configurable 5/7-stage pipeline with high-performance branch prediction
  • Configurable instruction and data caches and local memories
  • Flexible L2 memory option can be configured at initialization to be either a fixed-address memory, L2 cache, or a combination of both, and gives users the power and flexibility to tune their cached-based or fixed memory to their unique application requirements
  • Extensibility with application-specific instructions, execution units, register files, and I/Os
  • Enhanced AMBA interfaces, including native AMBA 4 AXI and new APB manager interface
  • IEEE 754-compliant single-precision and double-precision floating-point unit
  • Low-latency integrated DMA (iDMA) controller with support for extended addressing, 3D DMA transfers, and zero-value decompression
  • Memory protection options, including region protection, memory protection unit (MPU), and memory management unit (MMU)
  • Enhanced Functional Safety features and documentation to support ISO 26262 compliance
  • Industry-standard debug features like JTAG and multi-core debug support

Partners

Cadence, through its Tensilica processor IP, brings together best-in-class products and services from industry leaders to help you accelerate the development of your SoC designs while meeting your demanding power and performance requirements. Browse the list of Tensilica processor IP service partners below.

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Technologies

Functional Safety for Automotive

Cadence is committed to enabling Functional Safety applications across the Tensilica processor lineup, whether it's an off-the-shelf processor/DSP IP or a custom domain-specific processor for a specific application

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Tensilica Processor Technology

Differentiate, reduce time to market, add flexibility, and get the best performance, power, and area

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TIE

Customize your DSPs/processors for optimized performance, energy efficiency, and differentiation

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Development Toolchain

Create a perfect match for your application, guaranteed correct by construction

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Training & Support

Need Help?

Cadence is committed to keeping design teams highly productive with a range of support offerings and processes designed to keep users focused on reducing time to market and achieving silicon success.

Free Software Evaluation

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Training

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Online Support

The Cadence Online Support (COS) system fields our entire library of accessible materials for self-study and step-by-step instruction.

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Xtensa Processor Generator (XPG)

The Xtensa Processor Generator (XPG) is the heart of our technology - the patented cloud-based system that creates your correct-by-construction processor and all associated software, models, etc. (Login Required)

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Technical Forums

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Resources

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