Second-Generation AI Accelerator Design Providing Best FPS, FPS/mm2, and FPS/Watt

The Cadence® Tensilica® DNA 150 architecture incorporates custom hardware accelerator engine (NNE) and a Tensilica Vision P6 DSP. The specialized hardware compute engine inside the DNA 150 processor leverages sparsity for both compute and bandwidth reduction. A single-core DNA 150 NNE engine scales from 256 to 2K MAC for 8*8 bit MAC computation. The Tensilica DSP will accommodate any new neural network (NN) layer that is not currently supported by the hardware engines inside the DNA 150 processor, while also offering the extensibility and programmability of a Tensilica Xtensa® core using Tensilica Instruction Extension (TIE) instructions. The DNA 150 processor can run all NN layers, including but not limited to convolution, fully connected, LSTM, LRN, and pooling.

Key Benefits

Scalable IP for Various Workloads

Machine learning workloads can range from low compute (TOPS) to very high compute (TOPS) depending on use cases

Best-in-Class Performance

Software compiler is able to extract maximum MAC utilization and use of attributes like sparsity to get good throughput, low latency, low bandwidth, and low energy consumption

End-to-End XNNC Toolchain

GLOW-based XNNC software can quantize the network and map to hardware very efficiently

Scalable in Terms of FPS/mm2 for All MACs

GLOW-based Xtensa Neural Network Compiler (XNNC) software

Features

  • Supported XNNE MAC configurations: 256, 512, 1024, 2048 8-bit MACs (# of 16-bit MACs = 1/4th of # 8-bit MACs)
  • Supported UBUF configurations: 256KB to 2MB in step of 256KB
  • Bandwidth configurations: 32/16/8/4 bytes/clock and AXI bus of 128- or 256-bit width
  • Clock rate: XNNE Up to 1GHz
  • Leverage run-time sparsity-based cycle speedup
  • 4-bit weight clustering 
  • Runtime Tensor bandwidth compression
  • 4-bit Weights Clustering
  • Asymmetric Quantization support

Partners

Cadence, through its Tensilica processor IP, brings together best-in-class products and services from industry leaders to help you accelerate the development of your SoC designs while meeting your demanding power and performance requirements. Browse the list of Tensilica processor IP service partners below.

Technologies

Functional Safety for Automotive

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