Tensilica FloatingPoint DSP 具有低功耗和出色的单位面积性能
Cadence® Tensilica® FloatingPoint KP1/KP6 DSP 提供高性能的浮点计算吞吐量，并具有能耗低和面积小的特点。Tensilica FloatingPoint KP1/KP6 DSP 具有出色的可配置性和可扩展性，使系统级芯片设计者能够灵活地配置浮点 DSP，以满足他们的性能要求和低能耗、小面积的预算。Tensilica FloatingPoint KP1/KP6 DSP 针对依靠电池供电的设备、AI/ML、AR/VR、电机控制、智能传感器、传感器融合、ADAS、自动驾驶等应用进行了优化。
核心优势
性能、功耗和面积
具有出色 PPA 的 DSP，专为浮点处理而设计
超低能耗，占用面积小
高性能、低能耗、小尺寸
可扩展性
ISA 适配超高性能 Tensilica FloatingPoint KQ7/KQ8 DSP
软件可移植性
通用浮点 ISA 支持 DSP 之间的轻松软件迁移
可扩展、可配置
可定制的指令集，用于实现差异化，进一步提高性能
主要功能
-
VLIW 并行技术可在每个周期发出多个并发操作 - Xtensa LX 安全模式
- 128 位和 512 位 SIMD
- IEEE 754 矢量浮点数
- 性能优化的融合乘加 (FMA)
- 8b/16b/32b/64b 整数 ALU 运算
- 针对 FFT 运算进行了优化
- 增强的复数计算处理
- 卓越的自动矢量化支持
- TIE(Tensilica 指令扩展) 支持轻松扩展并进一步增强性能
- 经过优化的 Eigen、NatureDSP、Math 和 SLAM 库，便于软件开发
Partners
Cadence, through its Tensilica processor IP, brings together best-in-class products and services from industry leaders to help you accelerate the development of your SoC designs while meeting your demanding power and performance requirements. Browse the list of Tensilica processor IP service partners below.
Technologies
Functional Safety for Automotive
Cadence is committed to enabling Functional Safety applications across the Tensilica processor lineup, whether it's an off-the-shelf processor/DSP IP or a custom domain-specific processor for a specific application
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Tensilica Processor Technology
Differentiate, reduce time to market, add flexibility, and get the best performance, power, and area
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TIE
Customize your DSPs/processors for optimized performance, energy efficiency, and differentiation
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Development Toolchain
Create a perfect match for your application, guaranteed correct by construction
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Cadence is committed to keeping design teams highly productive with a range of support offerings and processes designed to keep users focused on reducing time to market and achieving silicon success.
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Xtensa Processor Generator (XPG)
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