Performance Leading DSP for Audio, Vision, AI with Auto-Vectorization

HiFi 5s greatly improves TTM by allowing the compiler to automatically vectorize data processing, eliminating the need for time-consuming hand-optimization, opening up the DSP to every embedded programmer. It brings double-precision MACs and ISA to accelerate modern audio algorithms requiring high range and precision. Lightweight imaging and vision algorithms are accelerated with special ISA.

Auto-vectorization support unburdens the programmer from expert-level hand-optimization, opening up the HiFi 5s DSP to a vast pool of non-DSP programmers, lowering development cost, and accelerating TTM. The expanded ISA and MACs allow modern audio algorithms to run more efficiently OOB by utilizing the added double-precision features and run lightweight vision cases along with audio.

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HiFi iDMA diagram

Auto-Vectorization, Double-precision, Versatility with Imaging ISA

Auto-Vectorization

Enables the compiler to automatically vectorize data arrays to utilize the SIMD structure of HiFi 5s. Eliminates the need for hand-optimization

DSP and AI Performance

Inherits the DSP and ML leadership of HiFi 5 and extends that with performance enhanced LX8 platform

Lightweight Imaging and Vision

Imaging targeted ISA and MACs for always-on lightweight vision applications to run standalone or in conjunction with a Vision DSP

Double-Precision Floating-Point

Greatly accelerates double-precision math functions found in audio and voice code, obviating the need to tradeoff precision with range

Highest performance audio and AI DSP, easy to program with better system-level performance

  • All the features of HiFi 5 DSP
  • Imaging ISA and 32 8-bit (and 8x16) MACs for lightweight vision applications
  • Double-precision acceleration hardware for Audio and Vision math functions
  • Auto-vectorization support for porting efficiency and fast TTM

Feature

HiFi 5s

Load Units

2

VLIW Slots

5

Scalar operations

2 slots

Accumulator Width

64/72 bit

Auto-vectorization

Yes

Fixed Pt MACs per

cycle

32x32

8

32x16

16

16x16

16

8x16

32

8x8

32

SP/HP FPU (integrated, optional)

2x4-way/2x8-way

DP FPU (integrated, optional)

Yes

Imaging/Vision ISA

Yes

Expanded Instructions for NN

Yes

Arithmetic decoding

Yes

AVS (Huffman and bitstream operation)

Yes

Coremark

5.5

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Cadence, through its Tensilica processor IP, brings together best-in-class products and services from industry leaders to help you accelerate the development of your SoC designs while meeting your demanding power and performance requirements. Browse the list of Tensilica processor IP service partners below.

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