Vision 110

Overview

Latest Energy Vision DSP targeting low-end Vision/Radar and AI SOC market

The Cadence Tensilica Vision 110 DSP is the latest addition to the Vision DSP family. The smallest Vision DSP targets lower power, always-on applications offering one-third the power and area compared to the 512-bit SIMD Vision 130 DSP, while offering an easy software transition from Vision 110 via the N way programming model, and previous generation Vision P1 DSP. Vision 110 DSP also offers the flexibility to configure without various features to reduce area and the data RAM.

Key Benefits

Area and Power Optimized

128-bit SIMD with lowest area and power among the Vision DSPs and lower power compared to host CPU and GPU

Vision/Image Processing

Instructions set optimized for computer vision and image processing applications

High Performance

> 0.256TOPS AI performance for object detection, image classification, Image segmentation

Features

Cadence, through its Tensilica processor IP, brings together best-in-class products and services from industry leaders to help you accelerate the development of your SoC designs while meeting your demanding power and performance requirements. Browse the list of Tensilica processor IP service partners below.

256/128b Load/Store capabilities
128 8-bit MAC
8/16/32-bit fixed-point processing
Single-precision (FP32) and half-precision (FP16) floating-point processing
Integrated 3D iDMA
User-defined instructions support
Built on LX8 Xtensa processor offering best energy efficiency
ISO 26262 ready for automotive market

Partners

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Technologies

オートモーティブ向け機能安全

テンシリカのプロセッサは、既製のプロセッサ/DSP IPであれ、特定のアプリケーションに特化したカスタム・ドメイン・プロセッサであれ、機能安全アプリケーションを可能にすることをお約束します。

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テンシリカ・プロセッサ・テクノロジー

差別化、市場投入までの時間短縮、柔軟性の向上、最高のパフォーマンス、電力、面積を得るために

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TIE（Tensilica Instruction Extension）

パフォーマンス、エネルギー効率、差別化を最適化するDSP/プロセッサのカスタマイズ

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開発ツールチェーン

お客様のアプリケーションに完全にマッチし、構築しながら最適なプロセッサが得られることを保証します。

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Training & Support

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Cadence is committed to keeping design teams highly productive with a range of support offerings and processes designed to keep users focused on reducing time to market and achieving silicon success.