Accelerate the Creation of Software-Defined Vehicle Functions and Stay Ahead of the Curve

The concept of software-defined vehicles is bringing about a significant change in how cars are designed, built, and serviced. A scalable open architecture based on standards will enable hardware and software compatibility, faster integration, remote updates, customization of features, and a seamless connection to other devices and services.

Cadence and Arm are working together to create a chiplet-based reference design and software development platform to accelerate the design of software-defined vehicles. This SOAFEE-compliant platform enables developers of automotive technology to process Arm® AE IP and Cadence Tensilica IP in a heterogeneous manner, making it easier to integrate complex systems and software. This collaboration fosters innovation and ensures compatibility across various platforms, helping automakers accelerate the creation of software-defined vehicle functions and stay ahead of the curve.

Software-Defined Vehicle
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Open Architecture Enables Compatibility, Customization, and Seamless Connection

Productivity and Efficiency

Stay ahead of the curve by rapidly developing software-defined vehicle functions with ease

Open and Scalable

SOAFEE-compliant architecture for easy integration of complex systems and software, fostering innovation and compatibility across platforms

Industry-Leading Alliance

Combines Cadence's leading EDA tools, semiconductor IP, and subsystems with Arm’s industry-leading AE IP

Cadence and Arm Accelerate Time to Market for Software-Defined Vehicles

Chiplet-Based Reference Design

  • Predefined and validated automotive reference platform combining industry-leading IP and subsystems
  • Heterogenous computing platform based on Arm IP and Cadence Tensilica processor IP
  • Cadence automotive IP for industry-leading interface and memory protocols, including UCIe™ for high-speed chiplet-to-chiplet communication
  • Comprehensive compute IP portfolio including advanced AI solution, Neo neural processing unit (NPU) IP, NeuroWeave software development kit (SDK) for machine learning (ML) solutions, and world-class DSP compute solutions

Software Development Platform Using Helium Studio

  • SOAFEE compliant
  • Instruction accurate, targets software runs without changes
  • Full programmer view of memory, registers, and interrupts
  • Loosely timed and fast enough for OS boot
  • Available 6-12 months before silicon
  • Runs on standard x86 workstations