Overview
The Arm SystemReady standards ensure Arm-based servers, infrastructure edge, and embedded IoT systems are designed to specific requirements, enabling generic off-the-shelf operating systems to “just work.” To provide a low-risk path to SystemReady compliance, Cadence collaborated with Arm for pre-silicon compliance testing. Pre-silicon compliance allows SoC design testing before tapeout to reduce cost and risk for our silicon partners. Cadence then designed the System VIP SystemReady library, capturing the map of tests down to a bare metal (BM) abstraction layer. This accelerates compliance testing and debugging in development effectively with 120 self-checking tests on our Palladium emulation and Protium prototyping platforms.
Key Benefits
Reduces SoC developer’s risk by catching Base System Architecture (BSA) compliance bugs before tapeout
Confirms the architecture intent is understood correctly
Prevents costly silicon respins and software workarounds
Enables a well-defined and low-risk path to SystemReady compliance
Features
The SystemReady test library also helps in PCIe testing and validation of correct PCIe behavior at the system level. Cadence offers verification solutions—from early software bring-up to use-case testing, debugging, and performance analysis—ideal for Arm®-based SoC designs. Cadence and Arm enable customers to accelerate BSA compliance testing through emulation. This joint solution is essential to ensure that standard.
Resources