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In this preface to the RF Microwave Module session, we discuss the motivations that lead to the topics in this session and outline the various Cadence solutions at a high level.

Designing RF PCBs has never been easier than with the PCB design and simulation features added in the V16 release of the Cadence AWR Design Environment® platform. The first part of this talk will discuss some pre-existing and new features that are extremely beneficial to modern RF PCB designers, including how to:

• Easily route from one location to another using intelligent nets, including layer changes, with automatic insertion of the appropriate vias
• Use physical constraint set rules to drive the AWR® dynamic voiding engine to have Allegro® technology-type dynamic voiding, smoothing, and eliminate non-manufacturable geometries such as islands/peninsulas
• Easily and robustly EM simulate your PCB with AXIEM® or Analyst™ analysis or the Clarity™ 3D Solver—depending on your needs, the optimal EM simulation engine is available with just a few clicks.
• Perform thermal analysis on your design with the Celsius™ Thermal Solver, now integrated into the AWR Design Environment platform

The second part of the talk will focus on AWR and DE-HDL/Allegro interoperability by showing a design flow where the RF designer is designing in the context of Allegro parts and technologies. This allows the IP created in the AWR Design Environment platform to be seamlessly transferred to Allegro DE-HDL technology and eliminates the need for manual design re-entry or replacement of parts/vias, thereby saving time and eliminating error-prone manual translation flows. What is shown is a power amplifier designed in the AWR Design Environment platform with a unified library that contains the technology and part information from DE-HDL/Allegro technology. The design is then exported from the AWR Design Environment platform and imported to DE-HDL/Allegro technology.

In this preface to the RF Microwave Module session, we discuss the motivations that lead to the topics in this session and outline the various Cadence solutions at a high level.

Designing and simulating RF MMICs has never been easier than with the RF MMIC design and simulation features added in the Version 16 release of the Cadence AWR Design Environment platform. The first part of the talk will discuss some pre-existing benefits and added features that enable RF MMIC designers to be more efficient within the AWR Design Environment platform:

• AWR software utilizes a unified database, which keeps the schematic and layout synchronized for time-saving concurrent electrical and physical design
• Microwave Office® software supports automatic layout interconnect between transmission line elements and electrical components through PDK bridge code
• Real-time tuning and optimization of circuits to achieve superior performance and to meet spec goals
• An advanced waveform viewer to provide insightful design information to engineers developing RF front-ends for communications and radar systems
• Within the AWR Design Environment platform, you will find multiple integrated EM solvers to perform in-situ S-parameter extraction for all types of high-frequency structures, allowing for co-design with RF/microwave circuits and ensuring fast and accurate simulation results:
  • AXIEM 3D EM planar analysis is the 3D method of moments EM solver for planar designs
  • Analyst 3D FEM EM analysis is a high-frequency 3D FEM EM simulator for RF in-design and modeling of individual 3D components such as wire bonds 
  • Clarity 3D Solver is Cadence’s fast 3D FEM EM simulator solution for high-capacity design verification of large complex systems
• For thermal simulation, the AWR Design Environment platform has integrated the Celsius Thermal Solver to provide RF engineers with the ability to investigate the impact of electrothermal effects on design reliability and performance

The second part of the talk will be focused on the AWR and Virtuoso®/Virtuoso RF interoperability export flow, followed by a demo. The demo will show how to take an existing AWR software design and export it to the Virtuoso environment. This demonstrates new functionality that allows IP created in the AWR Design Environment platform to be seamlessly transferred to the Virtuoso/Virtuoso RF environment and eliminates the need for manual design re-entry of schematics and layouts. What is shown is a power amplifier designed in the AWR Design Environment platform with a process that is not available in the Virtuoso environment. The exported library contains the technology information to view both the schematic and layout in the Virtuoso environment as well as simulate the exported IP in a Spectre® simulator.

The Cadence Clarity 3D Solver is a 3D electromagnetic (EM) simulation software tool for designing critical interconnects for PCBs, IC packages, and systems with 3D structures such as connectors and enclosures. It enables you to handle the most complex EM challenges when designing systems for aerospace and defense with gold-standard accuracy. This video will introduce you to the distributed multiprocessing technology that enables the Clarity 3D Solver to deliver virtually unlimited capacity and 10X speed to efficiently and effectively address large and complex electrical structures. It will also show a simple and easy-to-use two-step workflow for running EM simulations of a Rigid-Flex design utilizing Cadence’s Allegro PCB Designer and Clarity 3D Solver.

GaN and GaAs MMIC designers in the aerospace and defense industry often rely on the mechanical thermal team to evaluate the thermal impact of the chip at the end of the design cycle, which may be late for a respin if required. <br>What is ideal is having the capability of designing a thermal-aware MMIC chip early on. The Cadence Microwave Office – Celsius integrated workflow allows a MMIC designer to consider the thermal performance of the MMIC chip from Microwave Office software even before having the mechanical thermal team evaluate the chip thermally for the final signoff.

Many industries are pivoting from monolithic SoC/ASIC level integration to multi-chip(let) packaging architectures. A big reason for this shift is that the latest silicon-centric and 3D stacking packaging solutions can achieve very similar power, performance, and area (PPA) as a monolithic SoC, while providing a lower cost and more flexible design solution. This presentation will cover the current trends in multi-chiplet packaging 3D architectures, as well as outlining the current Cadence design and analysis solutions for these system-level design architectures.

A very common requirement for systems architects is to develop rough targets for the power, performance, and area (PPA) of the final system they are specifying. Ad-hoc mechanisms are often used to come up with these numbers, and they are notoriously inaccurate. Learn how you can use Cadence’s Stratus™ HLS to collect significantly more accurate PPA estimates by combining early, abstract C++ system models and Stratus HLS to actually measure these numbers and to explore the impact of different architectural decisions on those PPA projections.

This presentation introduces the Cadence verification solution, focusing on mixed-signal verification using SV real number behavioral models. Problems with the current mixed-signal simulation approach are identified and then addressed using SV RNM. Three actual customer examples are provided, showing what their problems were, how we addressed those problems, and the results.

As aerospace and design electronic systems grow, verifying digital hardware grows exponentially with analog and software compounding the task. Evolving requirements due to changing threat profiles further complicate rapid deployment. Quantifiable assurance (QA) can address this challenge by abstracting data throughout the development flow. In this presentation, we will discuss how Cadence vManager™ Verification Management provides proven metric analysis enabling verification QA. We will demonstrate how it integrates data from engines running low-power, hardware/software, safety, and other verification tasks to show you how to get started with QA.

What is Computational Fluid Dynamics (CFD) and how does it extend the Cadence multiphysics system analysis and design capacity? Fluids are present everywhere; in our environment and in nearly all sectors of industry, as vehicles of transport and of thermomechanical and chemical energy conversion systems. The full complexity of fluid flows can only be approached through numerical CFD simulations. Examples will illustrate the potential of our current CFD systems and the variety of applications they cover. CFD today is still facing major challenges related to flow turbulence and the industrial expectations for higher reliability and efficient exploitation of High-Performance Computing. Our response to these challenges will be addressed.

Simulation during system design, before constraints are frozen, is the most opportune time to optimize and differentiate your product. High quality mesh generation is a key enabler of simulation-lead design which requires robust, efficient, and accurate simulations. The Cadence Pointwise mesh generation tool provides the flexibility and features needed to achieve faster system simulation. Based on an aerospace heritage, the Pointwise meshing philosophy focuses on mesh quality and obustness while maintaining the flexibility to drop into a wide variety of workflows. The result is best-in-class geometry and meshing technologies which combine to provide the choice for CFD meshing.

Engineers and designers today need many different tools for their CFD analyses. The Cadence Omnis™ CFD Platform combines them all into one single environment, from meshing to solving to optimization. High-performing technology in a slick, easy-to-use interface streamlines the workflow of all its users. From the detailed analysis of a single component (e.g., an IC chip) to simulating a full system (e.g., an entire aircraft), Omnis users can combine the different physics, scale fidelity to need, and create as many designs as desired. It can be fully automated, driven by AI models and optimization algorithms, and is open to third-party software through powerful APIs.