Virtuoso Floorplanner Training
Date | Version | Country | Location | |
---|---|---|---|---|
Scheduled upon demandOn demand | EXPRESS INTERESTINQUIRE |
Version | Region | |
---|---|---|
IC6.1.7 | Online | ENROLL |
IC6.1.6 | Online | ENROLL |
IC6.1.3 | Online | ENROLL |
Other Versions | Online | EXPRESS INTERESTINQUIRE |
Length : 1 day
Course Description
This is an Engineer Explorer course. In some labs, you will use Virtuoso® Floorplanner to solve loosely defined problems. You need to be familiar with top-level floorplanning and Virtuoso XL connectivity-driven layout.
When you finish the course, you will be able to create top-level floorplan. You will use floorplanner to calculate area required for top-level boundary and top-level blocks. You create I/O rows, place I/O pads, insert filler cells, place corner cells, generate and place top-level blocks. Some blocks are existing blocks and some are calculated for their area. You also create a top-level floorplan without using existing layout to see how to calculate area and then modify blocks to fit in a specific top-level boundary.
Learning Objectives
After completing this course, you will be able to:
- Generate soft blocks to represent layout that has not been created
- Specify which cells to use when generating blocks in hierarchy
- Place blocks in top level
- Optimize pin placements for top-level routing
- Edit soft-block shapes to accommodate available area and pin alignments
- Use soft blocks for all top-level blocks to allow for maximum flexibility in floorplan
- Use SKILL® API-Based Flow for Virtuoso Floorplanner
Software Used in This Course
Virtuoso Layout Suite GXL
Software Release(s)
IC 6.1.7
Modules in this Course
- Using cdnshelp and Floorplanner Features
- Floorplanner Environment
- Configuring Physical Hierarchy
- Generating and Placing Physical Hierarchy
- Level-1 Editing
- Pin Optimization
- Top-Down Floorplanning
- API/SKILL-Based Flow for Virtuoso Floorplanner
- API/SKILL Based Flow for Virtuoso Floorplanner: SKILL APIs (Optional)
- Virtuoso Floorplanner Updates (Optional)
Audience
- Layout Design Engineers, Layout CAD Managers, IC Designers, Analog/Mixed-Signal IC Designers, Analog IC Designers, Custom Circuit Designers, Chip Designers
Prerequisites
You must have experience or knowledge of the following:
- Cadence® physical design tools, Layout design experience, Virtuoso XL connectivity-driven layout, Top-level floorplanning
Related Courses
- Virtuoso Layout Pro: T1 Environment and Basic Commands (L)
- Virtuoso Layout Pro: T2 Create and Edit Commands (L)
- Virtuoso Layout Pro: T3 Basic Commands (XL)
- Virtuoso Layout Pro: T4 Advanced Commands (XL)
- Virtuoso Layout Pro: T5 Interactive Routing (XL)
- Virtuoso Layout Pro: T6 Constraint-Driven Flow and Power Routing
- Virtuoso Layout Pro: T7 Module Generator and Floorplanner (XL/GXL)
- Virtuoso Layout Pro: T8 Debugging Layout Issues
- Virtuoso Layout Design Basics
- Virtuoso Abstract Generator
- Virtuoso Space-based Router
- Virtuoso Space-based Router Express
Please see course learning maps at this link for a visual representation of courses and course relationships. Regional course catalogs may be viewed here.