Port Your Custom IP Across Process Nodes to Retain Crucial Design Intent

Migrating designs across process nodes has evolved over many tool generations. Managing robust supply chains and navigating through geo-political challenges has generated renewed interest in the industry for design migration. With advanced automation for custom design and implementation, Cadence Virtuoso Studio ushers in the next era of automation tools that caters to varied custom IC design and layout migration flows.

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Save Several Weeks of Effort to Recreate Custom Design and Layout

Ease of Use

Migrate designs easily within Virtuoso schematic and layout editors

Simplified

Spreadsheet-style mapping of devices and parameters

Customizable

Single-cell or hierarchical layout regeneration

Automated

Optimize the device parameters on your target process node using Virtuoso ADE Suite

Generative AI-Enabled Custom Design and Layout Migration

  • Device mapping table with equation-based parameter mapping support
  • Fully automated intelligent schematic re-wiring
  • Choice of design optimizers including your own
  • Layout constraints extraction from source for automated layout migration
  • Interactive layout regeneration flow with placement reuse and incremental update

Comprehensive, Integrated Solutions Provide the Foundation for Virtuoso Studio

Schematic Mapping

The first step is to map the custom design schematic from the source process node to the target process node using the Virtuoso Schematic Editor. A table defining the mapping of devices and their parameters from source to target is provided as an input to the tool. If there are symbol mismatches, the tool does automatic rewiring on the mapped schematics.

Schematic mapping ensures that the new schematic is ready for netlisting and simulation.

Design Optimization

The mapped schematics and testbench with the design specifications are passed to the Virtuoso ADE Suite, optimizing the device sizes so that the circuit performance meets the specifications. A design space optimization flow offers built-in algorithms or the ability to integrate private algorithms for rapidly re-centering and optimizing designs​. The optimized design can be verified across different process corners to ensure that the design is reliable in the target process node.

The migrated schematic is ready and passed on to the layout migration step.

Layout Migration

The migrated schematic and source layout are passed to Virtuoso Layout Suite to regenerate the layout in target process node. The tool identifies the circuit structures, device grouping, and placement topologies in the source layout and templatizes them. Automatic place-and-route engines create the layout in the target process node using the extracted templates. The migrated layout retains the key design intents from the source layout and will be DRC and LVS correct according to the target process node.

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