Tempus Timing Solution and DSTA

Cadence and Socionext invite you watch our on-demand webinar to learn how the latest innovations in the Cadence Tempus Timing Solution can deliver faster time-to-signoff closure with the best power, performance, and area (PPA).

In this webinar, Socionext discusses their experience in using the Tempus solution’s distributed static timing analysis (DSTA) to sign off their 5nm full-chip design. The Tempus solution was used as part of Cadence’s Digital and Signoff full flow for this tapeout.

This webinar presents the following:

• Advantages of the Tempus solution’s DSTA—the industry’s fastest STA solution that handles full-chip capacity
• Proven success of Socionext’s innovative large-scale designs with advanced nodes as small as 5nm
• Achievement of fast overnight closure with 100M+ instances designs optimized for production