Datasheet

Spectre Simulation Platform

Comprehensive analyses for robust design and verification of analog, RFIC, memory, and mixed-signal designs

The Cadence Spectre Simulation Platform, built on an advanced infrastructure, combines industry-leading simulation engines to deliver a complete design and verification solution. It meets the changing simulation needs of designers by preserving results and IP as they progress through the design cycle—from architectural exploration, to analog and RF block-level development with flexible and reliable abstraction, including memory design, to final analog and mixed-signal full-chip verification for increased productivity and throughput. 

Spectre Simulation Platform

As the industry’s leading solution for balancing high-performance and capacity needs with analog accuracy, the Cadence Spectre Simulation Platform encompasses multiple solvers that allow a designer to move easily and seamlessly between circuit-, block-, and system-level simulation and verification tasks. The foundation of the platform is a unified set of technologies shared by all of the simulators—the parser, device models, Verilog-A behavioral modeling, input data formats, output data formats, etc.—thereby guaranteeing consistent and accurate evaluation methods regardless of the simulator selected. In addition to the individual solvers, the Spectre simulation technology is well integrated into other Cadence technology platforms, including Xcelium Logic Simulation, Liberate Trio Characterization Suite, Legato Reliability Solution, Virtuoso ADE Product Suite, Voltus-Fi Custom Power Integrity Solution, and the Virtuoso RF Solution, to provide the industry’s most comprehensive cross-domain simulation solution.

Figure 1: Spectre Simulation Platform

The Spectre Simulation Platform delivers an industry-leading set of technologies for a comprehensive design and verification solution that provides SPICE, radio frequency (RF), FastSPICE, and mixed-signal simulators in a unique shared licensing package. This unified solution delivers scalable performance and capacity, thus providing robust verification of analog, RF, memory, custom digital, and mixed-signal silicon realization. The Spectre Simulation Platform delivers a variety of simulators and analysis options in a flexible access model to provide designers with the appropriate simulation technology tailored for each stage of the customer design and verification flow. 

  • Spectre X Simulator is specifically designed to handle the largest pre- and post-layout designs with analog accuracy. It includes extensive distribution capabilities architected to maximize a cloud or server farm use model
  • Spectre FX Simulator provides high-performance and high-capacity verification and signoff of complex SRAM, DRAM, and flash memories along with full-chip SoC designs
  • Spectre Accelerated Parallel Simulator (APS) delivers high-precision SPICE and scalable multi-core simulation performance for complex and large analog and RFIC designs
  • Spectre AMS Designer delivers mixed-signal design and verification through reliable abstraction and with a faster convergence, leveraging Cadence Xcelium Logic Simulation
  • The Spectre RF Option provides a comprehensive set of RF analyses for pre- and post-layout RFIC design and can be used with Spectre APS or Spectre X technology
  • The Spectre CPU Accelerator Option enables the simulators to use more cores per simulation job to take advantage of large server farms and cloud applications
  • The Spectre Power Option enables specialized electromigration and IR drop (EM-IR) analysis within the Spectre Simulation Platform

The Spectre Simulation Platform delivers a common core infrastructure and an advanced database. It is fully integrated into Cadence’s Virtuoso Analog Design Environment and Xcelium design and verification flow. The complementary feature sets of these simulation engines deliver improved productivity and facilitate adoption as designs move through the architecture, implementation, and verification stages—and as simulation needs change (see Figure 1).

Benefits

Design quality and convergence

  • Uses silicon-accurate common device models universally supported by all foundry process design kits (PDKs)
  • Supports shared syntax and abstractions across all simulation engines and minimizes translation when moving among design domains
  • Features tight integration with the Virtuoso ADE Product Suite, with common use model, unique representation of Spectre capabilities, cross-probing, and back-annotation capabilities
  • Features tight integration into the Xcelium Logic Design Environment, with common use model, debugging, waveform viewing, and language support
  • Used as the analysis engine for the Cadence Tempus Timing Signoff Solution’s timing analysis, Cadence Voltus-Fi Custom Power Integrity Solution’s EM-IR analysis, Cadence Liberate LV Library Characterization, and mixed-signal timing analysis using Liberate AMS Mixed-Signal Characterization
  • Offers capacity for post-layout simulation and signoff analysis to ensure first-pass silicon realization success 

Scalability in performance

  • Delivers simulation performance for complex and large analog/RF, custom digital, and mixed-signal designs
  • Offers high-performance parallel simulation by harnessing the power of clusters of multi-core compute platforms to deliver peak performance

Productivity

  • Provides scalable performance-capacity transistor-level verification of a wide range of analog, custom-digital, memory, and mixed-signal designs
  • Offers flexible and reliable design abstraction for analogand digital-centric mixed-signal design flows, delivering faster simulation turnaround time

Features

Silicon-accurate modeling

The Spectre Simulation Platform offers the same device model equations across all simulators, eliminating model correlation issues and enabling faster convergence on simulation results. Common equations also ensure that new device model updates are available with all the simulators at the same time. Spectre device models are provided by the world’s leading foundries for all kinds of different technology nodes

Greater performance and capacity

The Spectre APS, Spectre X Simulator, Spectre RF Option, Spectre FX Simulator, and Spectre AMS Designer simulation engines provide the best combination of performance and capacity for verification of analog/RF and mixed-signal design without sacrificing accuracy of results.

Post-layout simulation

The Spectre Simulation Platform offers a flexible solution for SPICE-level post-layout simulations of complex and large designs—with millions of circuit devices dominated by parasitics. The Spectre Simulation Platform meets the SoC design verification challenge with a combination of unique parasitic stitching techniques and an accurate frequency-based parasitic modeling algorithm. This approach delivers the performance and capacity for post-layout verification of large designs. It also provides an optimized power-net simulation technique and methodology for analysis of effects such as EM-IR, signal integrity, timing, and substrate degradation.

Static and dynamic circuit checks

The Spectre Simulation Platform provides a comprehensive set of static and dynamic circuit checks. These circuit checks address two challenges designers have with simulation verification. Static checks are dedicated electrical rules checks that provide checks on the correctness of the structure of the design without simulation. Dynamic checks are electrical rules checks that run during the simulation and provide useful debugging information about hot spots in the design. Together these tools increase designer efficiency by helping them identify quickly where issues are in the design. These checks are available for Spectre X, Spectre APS, and Spectre FX simulators.

Native device reliability analysis

The Spectre Simulation Platform provides a full-chip native reliability simulation and analysis solution, enabling designers to consider reliability effects from the early stages of design until tapeout. Reliability analysis can simulate the degradation of device characteristics as a function of the circuit operation conditions and time, allowing for designers to ensure enough performance margin over the product’s operating lifetime. Spectre X Simulator and Spectre APS can be used in combination with the Cadence Legato Reliability Solution to extend its capabilities in aging, fault, and thermal analyses.

Native Verilog-A support

The Spectre Simulation Platform offers design abstraction for faster exploration of the design space, allowing better architectural decisions and supporting mixed-level simulation to accelerate top-level functional verification. The Verilog-A support is in full compliance with the Verilog-A 2.0 LRM.

Advanced analog and RF circuit analysis techniques

The advanced architecture of the Spectre Simulation Platform uses proprietary techniques—including adaptive time-step control, sparse matrix solving, and multicore processing—to provide high performance while maintaining signoff accuracy. Tight integration with the Virtuoso ADE Product Suite offers a user-friendly interactive set-up and advanced visualization of statistical results.

The Spectre RF Option to the Spectre X Simulator enhances the performance of the built-in Shooting Newton and Envelope Following Analyses. In addition, the Harmonic Balance solver can now take advantage of multiple cores and can be distributed across machines to maximize performance for fast results.

The Spectre Simulation Platform provides the flexibility to combine design IP from the different sources and abstraction levels necessary for the design and verification of today’s advanced mixed-signal SoCs. It accepts designs in combinations of various hardware description languages, allowing analog bottom-up and digital top-down design methodologies to link and enable complete analog/mixedsignal full-chip verification.

Specifications

Comprehensive list of device models supported

  • Advanced-node models, including the latest versions of the BSIM CMG, BSIM IMG, and UTSOI models
  • MOSFET models, including the latest versions of the BSIM3, BSIM4, BSIM Bulk (BSIM6), PSP, and HiSIM
  • High-voltage MOS models, including the latest versions of the HiSIM HV, MOS9, MOS11, and EKV
  • Silicon-on-insulator (SOI), including latest versions of BTASOI, SSIMSOI, BSIMSOI, BSIMSOI PD, and HiSIM SOI
  • Bipolar junction transistor (BJT) models, including the latest versions of VBIC, HICUM, Mextram, HBT, and Gummel-Poon models
  • Diode models, including the diode, Phillips level 500, and CMC diode models
  • JFET models, including the JFET, Phillips level 100 JFET, and Individual dual-gate JFET models
  • IGBT models, including PSpice IGBT model and HiSIM IGBT models
  • Resistors, including linear resistor, diffused resistor, CMC two-terminal and three-terminal resistor, and physical resistor models
  • GaAs MESFET models, including the latest versions of GaAs, TOM2, TOM3, and Angelov
  • GaN MESFET models, including Angelov, ASM, and MVSG models
  • Silicon TFT models, including RPI Poly-Silicon and Amorphous Silicon Thin-Film models
  • Verilog-A compact device models 
  • Z and S domain sources
  • Multi-conductor transmission line, pseudo-random binary sequence source
  • User-defined compiled model interface (CMI), allowing for the rapid inclusion of user-defined models
  • Josephson Junctions
  • Specialized reliability models (AgeMOS) for simulating the effect of HCI and BTI
  • Miscellaneous power models, including the relay, transformer, non-linear magnetic core, and winding
  • Miscellaneous RF models, including the DC block, DC feedthrough, and microstrip and stripline elements (bend, cross, corner, curve, open line, tee models)

Language and netlist support

The netlist formats, behavioral modeling languages, parasitic netlist formats, and stimulus files are common across the Spectre Simulation Platform. Supported formats include:

  • Spectre and SPICE netlist formats
  • Spectre, SPICE, and PSpice models
  • Verilog-A 2.0 LRM-compliant behavioral models and structural netlists
  • DSPF/SPEF parasitic formats
  • S-parameter data files in Touchstone, CITI-file, and Spectre formats
  • SST2, PSF, PSF XL, and FSDB waveform formats 
  • Digital vector (VEC), Verilog-Value Change Dump (VCD), Extended Verilog-Value Change Dump (EVCD), and digital stimulus

Platform support

  • x86 64-bit Red Hat Enterprise 6.5 (and higher) and V7, SLES 11 and 12
  • Commercially available cloud solutions

Cadence Services and Support

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  • Cadence Online Support gives you 24x7 online access to a knowledgebase of the latest solutions, technical documentation, Rapid Adoption Kits, software downloads, and more.
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