Spectre Accelerated Parallel Simulator (APS)

As the industry’s leading solution for balancing high-performance and capacity needs with analog accuracy, the Cadence Spectre Simulation Platform encompasses multiple solvers that allow a designer to move easily and seamlessly between circuit-, block-, and system-level simulation and verification tasks. The foundation of the platform is a unified set of technologies shared by all of the simulators—the parser, device models, Verilog-A behavioral modeling, input data formats, output data formats, etc.—thereby guaranteeing consistent and accurate evaluation methods regardless of the simulator selected. In addition to the individual solvers, the Spectre simulation technology is well integrated into other Cadence technology platforms, including Xcelium Logic Simulation, Liberate Trio Characterization Suite, Legato Reliability Solution, Virtuoso ADE Product Suite, Voltus-Fi Custom Power Integrity Solution, and the Virtuoso RF Solution, to provide the industry’s most comprehensive cross-domain simulation solution.

Post-layout simulation mode enables highprecision simulation and electromigration analysis

Spectre APS uses proprietary techniques to accelerate post-layout simulation. The post-layout simulation supports accelerated DC operating point calculation, an advanced matrix solver optimized for RC simulation and large matrices, and RC parasitic reduction. Multiple modes are provided to users that optimize set-ups for different applications, including custom IC simulation, analog IC simulation, and EM-IR analysis.

Comprehensive tools for statistical analysis

Spectre APS provides designers with the tools needed to analyze the effect of process variation on manufacturability and to reduce time to market at advanced process nodes. Traditional statistical analysis tools for corner analysis and Monte Carlo analysis are supported. Monte Carlo analysis has been enhanced with improved sampling methods to reduce the number samples required for converging to confidence interval. DC match and AC match analyses has been added to efficiently analyze local process mismatch effects and identify yield-limiting devices and parameters. Tight integration between Spectre APS and the Virtuoso ADE Product Suite offers a user-friendly interactive set-up, additional analysis capabilities such as Monte Carlo auto-stop, and advanced tools for visualization of statistical results. Fast Monte Carlo analysis from the Virtuoso Variation Option is now integrated natively into Spectre APS to allow batch-mode statistical analysis of standard cells.

Analyze stability and identify unstable and marginally stable feedback loops

Spectre APS provides stability analysis. Stability analysis can be used to simulate the loop gain and loop margin for either linear and periodic circuits. Stability analysis can be used for either single-ended or differential circuits. The loop finder feature was developed to supplement stability analysis and is used to identify which feedback loop in a multiple feedback loop is not stable or to find sources of marginal stability.

Accurate large signal noise analysis

Spectre APS provides transient noise analysis for large signal noise simulation. Transient analysis supports all noise types including thermal, shot, and flicker noise. To enable debugging the sources of circuit noise, noise injection from each device and each type of device noise is user controlled. Transient noise analysis results correlate well with linear and periodic noise analysis.

Behavioral modeling with Verilog-A

Spectre APS provides behavioral modeling capabilities in full compliance with Verilog-A 2.0. Verilog-A modules can be compiled for optimum simulation performance. Implementation is optimized for compact device models, offering comparable performance to built-in device models.

Native reliability and device aging analysis

Spectre APS provides native device reliability analysis. Users can simulate the degradation of device characteristics as a function of the circuit operation conditions and time. The native device aging analysis is used inside of the Legato Reliability Solution to analyze the interaction of device aging with process variation and device self-heating.

Built-in measurement with .measure and Spectre MDL

Standard SPICE measurement functions (.measure) are supported. In addition, Spectre APS offers the Spectre measurement description language (MDL) to simulation measurements and to automate standard cell library characterization. Spectre MDL enables the designer to post-process simulation results, make measurements, and tune the simulator to provide the best performance/accuracy tradeoff for a specific measurement.

Advanced device modeling and support

Spectre APS supports MOS, BJT, specialty transistor models, resistors, capacitors, inductors, transformers and magnetic cores, lossy and lossless transmission lines, independent and controlled voltage and current sources, and Z and S domain sources. Spectre APS provides a user-defined compiled model interface (CMI). It allows for the rapid inclusion of user-defined models for a “model once, use everywhere” capability.

EM-IR analysis

Spectre EM-IR is a transistor-level electromigration and IR drop (EM-IR) tool based on a patented voltage-based iteration method and can be used with Spectre APS. Two analysis options are provided: direct method, high accuracy, and iterated method, high capacity. This analysis provides best-in-class transistor-level EM-IR accuracy, especially in advanced-node FinFET processes. It uses Cadence’s patented voltage-based iteration method, which requires a smaller memory footprint and runs faster than the industry’s traditional current-based iteration method.

Asserts and circuit checks

Spectre APS provides tools to monitor device operating conditions or check for common design problems, such as high impedance nodes, leakage paths, or power consumption problems. Spectre assert checks monitor design or model parameters, element or subcircuit terminal currents, element or subcircuit terminal voltages, or operating point parameters for violations of user-defined conditions. Circuit checks are provided to check for more complex circuit problems, such as identifying floating nodes or leakage paths. Two types of circuit checks are provided, dynamic checks and static checks. Dynamic checks are performed during transient simulation while static checks are performed during parsing.