APLAC Circuit Simulation Technology

Cadence APLAC high-frequency circuit simulation technology brings the benefits of harmonic balance (HB) analysis to the design of complex, extremely nonlinear circuits. APLAC technology is used extensively for IC design at leading device manufacturers globally. The unique implementation of HB and transient analysis gives you extremely fast and exceptionally accurate results.

Features at a glance

  • Seamless integration within the AWR Design Environment Microwave Office circuit design software
  • APLAC modeling language supports user-defined linear and nonlinear models as well as measurements
  • Comprehensive set of convergence aids for DC, AC, HB, and transient simulations
  • HB simulators for highly nonlinear and complex designs
  • Transient-assisted harmonic balance (TAHB)
  • Multi-rate harmonic balance (MRHB)
  • Linear and nonlinear noise analysis
  • Dynamic oscillator analysis
  • Verilog-A model support and I/O buffer interface specification (IBIS) model for I/O driver circuits
  • Fully exploits the power of multi-core PCs

What is APLAC?

Multi-domain analysis

APLAC multi-domain analysis enables the simulation of any RF or analog circuit with a selection of analysis methods, including DC operation point, linear frequency domain, time domain, HB, phase noise, linear/nonlinear noise, and accurate yield predictions. Each circuit can be analyzed in multiple ways simply by altering the analysis definitions. Optimization, tuning, and a Monte Carlo statistical feature (for design yield) are available with every method. APLAC HB and time-domain solvers can be driven from the same schematic, with the same sources, and the same models.

APLAC usage is fully transparent to the user. Choose the APLAC simulator from the simulator list and run the simulation
APLAC usage is fully transparent to the user. Choose the APLAC simulator from the simulator list and run the simulation

High-Capacity HB and Time-Domain Simulators

The APLAC HB algorithm minimizes memory requirements and simulation time while maintaining a high degree of accuracy. APLAC technology embodies multiple HB engines, including an enhanced HB method, a TAHB method, and an MRHB method. The enhanced HB method enables the simulation of larger circuits faster than traditional microwave HB techniques. TAHB is for digital divider circuits and accurate nonlinear phase noise measurements for analog and RF applications. MRHB is a reformulation of the basic HB technique. It identifies the harmonic needs of the individual nonlinear components or signal paths and reduces the harmonic solution matrix accordingly. The overall effect is several orders of magnitude reduction in memory requirements by solving only the required harmonics for each component or signal path.

  • Fully compatible with all Microwave Office RF elements
  • Support for III-V and silicon RF transistor models
  • Scattering parameters accurately simulated in the time domain 
  • Phase-locked loop (PLL) macro model for synthesizer simulations