Allegro X Design Platform

Including technology references for OrCAD Capture, Capture CIS, System Capture

EE cockpit and electrically-aware design

The schematic capture product is more than simply connecting components. It is the one point where electrical engineers should be able to access all design data seamlessly. Having all information in one place reduces the risk of translating across tools and saves time.

Before fully rolling back the data of the design , view a preview of any previous design version. Fix errors faster than ever and ensure optimal usability and productivity among teammates. Then, roll back the design to a specific version and continue designing from that point if needed.

In addition, engineers can also ensure that the right connectors are chosen during the partitioning process for size and compatibility by viewing the 3D models of the connectors. This allows them to avoid surprises later in the design cycle with mismatched connectors or orientations.

Reliable design

Will the parts in your design withstand the voltages they will be subjected to—with a margin to spare? Are there any unintended schematic errors in your design that might cause system failure? The Allegro X Design Platform automatically checks such situations, where manual checks can be tedious and error-prone, and generates a reliable design.

Electrical overstress

Identify components that might be approaching or exceeding the recommended overstress rating. Also, identify components that might be overderated to help select lower-cost parts. The Allegro X Design Platform allows you to customize the degree of accuracy needed vs. the time required for the analysis. Analyze derating at different temperatures and override default SPICE models for extra precision. For outstanding use cases, elect to run only on portions of the schematic that are not already analyzed. Finally, base your review and signoff on the component types used in the schematic.

Schematic audit and validation

Identify and correct schematic issues with automation—issues normally caught during manual design reviews. There are dozens of schematic checks, such as connectivity, device selection, protocol specific, power nets, and graphical. Detect both visual and functional issues. Configure issue priority for optimal workflow. Waive issues deemed non-issues.

The Allegro X Design Platform has a set of schematic checks to prevent common errors. These checks can be customized, and new checks can be written for a company’s design review needs.

System connectivity integrity

With the system definition and detailed implementation disconnected, designers of multi-board systems must manually check connectivity across boards to ensure system connectivity integrity. This manual effort often involves writing utilities to extract data from the board files and then comparing the extracted data in a spreadsheet. Any errors in this process or lack of rigor to check it before the designs are handed off to manufacturing will result in an unnecessary spin of the board(s) to match the right signals on two sides of the mating connectors.

The Allegro X Design Platform maintains system connectivity integrity. Any change on one board that is not matched on the corresponding board will be identified, thereby avoiding any surprises in the system integration test in the lab.

Library/Component management

Managing components and libraries of components for a team can be challenging. A centralized repository is necessary to ensure all stakeholders refer to the latest and correct component information. System Capture helps in this communication between the supply chain, library part creators, and the system designers without resorting to external spreadsheets and emails.

Library compatibility

Migrating tools is always a stressful event. Compatibility with DE-HDL and OrCAD Capture-based OLB libraries makes this migration that much smoother and less risky. System Capture helps you create new designs with existing libraries from DE-HDL and OrCAD Capture’s CIS libraries.

Component interface

The Allegro X Design Platform enables access to third-party component providers to address the ever-changing circumstances of component availability. Draw this data directly into your workflow to ensure the best component selection.

New part request

The Allegro X Design Platform's new library and component information ecosystem uses optimized workflows for part requests. Now, if a part is unavailable in the current library, a “New Part” request option allows you to request the new part with fields pre-populated with available data.

Schematic-driven placement

In many instances, placement on the layout must be driven by the symbol placement in the schematics. Allegro System Capture enables two-way cross-probing with the Allegro PCB Editor to locate components in the schematics and vice versa. To assist in the placement phase, place components in the Allegro PCB Editor by selecting the components in the Allegro System Capture canvas. Also, place all components on a schematic page in a single step in the Allegro PCB Editor.

In addition, engineers can specify the component association between an active device and associated decoupling capacitors, as well as the maximum distance between the decoupling capacitors and the power/ground pins on the active component. This specification lets PCB designers quickly place the decoupling capacitor within the required distance. With this association, the Allegro PCB Editor shows a circle from the pin being decoupled to place the capacitor, accelerating the overall layout process, as discrete components often comprise over 66% of the components to be placed on a PCB.

Efficient design process

Speed of design is essential in releasing a product as fast as possible. The Allegro X Design Platform offers capabilities that help electrical engineers design schematics in the fewest number of mouse and keyboard clicks.

Instantiate bypass caps

The Allegro X Design Platform also adds several efficiency improvements for frequently used processes. For ease of use, we have added new features for instantiating large numbers of bypass capacitors through a form. This enables the quick creation of a clean-looking array of capacitors and helps prevent accidental no-connects or shorts that—though we do not want to admit it—happen when dealing with larger numbers of repetitive instantiations.

Customization and extensibility

The Allegro X Design Platform enables customization and allows users to extend the capabilities provided out of the box through a TCL (an interpreted, general-purpose, high-level programming language) interface. Engineers can write TCL programs to customize the Allegro X Design Platform and create custom commands. The custom programs can be used to query and modify the design data in the system. Placing these programs in a common area allows you to share the efforts of all team members.

Net Groups

Managing individual nets can be time-consuming, frustrating, and error-prone. An integral solution for decades has been to merge nets together to create busses. However, what if several different busses are related to each other? Do the busses need to be managed separately? Not with Net Groups. A DDR bus with data, address, and command/control busses in a channel can be combined into a single DDR Net Group. A set of all the PCIe^® lanes could be combined into a single Net Group to keep the I/O section organized. This makes it much easier to track signals without a crowded schematic.

Net Groups seamlessly integrate with hierarchical design blocks using Port Groups. Port Groups make it very easy and intuitive to connect design blocks with a large number of nets to other layers of the hierarchy.

Import blocks and sheets

Most new schematics reuse some portion from previous designs. The Allegro X Design Platform provides multiple means of reusing portions of previous designs—from simple copy and paste from a design to single- or multiple-page reuses to complete block reuses. Constraints specified on the design come across to the new design, ensuring that the complete design intent is reused, not just the graphics.

The Allegro X Design Platform allows you to create “reuse” blocks and place them in a library for use in other designs, just as with components. The connectivity, constraints, and layout from each block can also be reused. The same block can be used in the same design multiple times without renaming or copying.

The Allegro X Design Platform also allows users to reuse portions of existing designs created in Allegro Design Entry HDL (DE-HDL) and Allegro Design Entry CIS (DE-CIS), preserving their investment. The Allegro X Design Platform makes logical and physical design reuse simpler, better, and faster.

Version control and variant management

The Allegro X Design Platform not only allows saving the design but also tracks design changes made over time. Everyone in the industry has, at one point, had to handle multiple design files through email. Keeping design accuracy and the proper file tracked across multiple parties and design iterations is borderline impossible.

Including technology references for: PCB Designer, PCB Editor, DesignTrue DFM, Sigrity Aurora

Constraint-Driven PCB Editing Environment

At the heart of the Allegro X Design Platform is a PCB Editor—an intuitive, easy-to-use, constraint-driven environment for creating and editing simple to complex PCBs.

Its extensive feature set addresses a wide range of design and manufacturability challenges:

The PCB Editor can also generate a full suite of phototooling, bare-board fabrication, and test outputs, including Gerber 274x, NC drill, and bare-board test in a variety of formats.

Constraint management

A constraint management system displays physical/spacing and high-speed rules along with their status (based on the current state of the design) in real-time and is available at all stages of the design process. Each worksheet provides a spreadsheet interface enabling users to define, manage, and validate the rules hierarchically. With this powerful application, designers can graphically create, edit, and review constraint sets as graphical topologies that act as electronic blueprints of an ideal implementation strategy. Once they exist in the database, constraints can drive the placement and routing processes for constrained signals.

The constraint management system is completely integrated with the PCB Editor, and constraints can be validated in real time as the design proceeds. The result of the validation process is a graphical representation of whether constraints pass (highlighted in green) or fail (highlighted in red). This approach allows designers to immediately see the progress of the design in the spreadsheets, as well as the impact of any design changes.

Display and visualization

The built-in 3D viewer is available in all PCB Editor products. The 3D environment supports several filtering options, camera views, graphic display options such as solid, transparency, and wireframe, and mouse-driven controls for pan, zoom, and spinning the display. 3D viewing also supports the display of complex via structures or isolated sections of the board. Multiple display windows can be opened using the context-sensitive command structure, and 3D images can be captured and saved in JPEG format.

The flipboard capability “flips” the design about its Y axis, inverting the design database in the canvas. This “flip” reorganizes the display of the design such that what was displayed as top through to bottom becomes bottom through to top. A true bottom-side view from within the CAD system is essential for hardware engineers when debugging a board in the lab or for assembly/test engineers on the manufacturing floor. Flipboard is not just limited to viewing; design edits can also be performed while in this mode.

Interactive etch editing

The routing feature of the PCB Editor provides powerful, interactive capabilities that deliver controlled automation to maintain user control while maximizing routing productivity. Real-time, shape-based, any-angle, push/shove routing enables users to choose from “shove-preferred,” “hug-preferred,” or “hug-only” modes.

During etch editing, the designer can view a real-time, graphical heads-up display of how much timing slack remains for inter-connect that has high-speed constraints. Interactive routing also enables group routing on multiple nets and interactive tuning of nets with high-speed length or delay constraints.

Multi-Line routing

Multi-line routing allows users to route multiple lines as a group on the PCB quickly. Coupled with the “hug-contour” option, this utility can help designers route multiple lines on the flex portion of the rigid-flex design in minutes instead of hours with traditional one trace at a time. The hug-contour option inserts traces with curves that are aligned to the contour of the flex portion of the design. (See Figure 4.)

Timing Vision

Timing Vision is an innovative and unique environment that allows users to graphically see real-time delay and phase information directly on the routing canvas. Traditionally, evaluating the current status of timing/length of a routed interface requires numerous trips to the Constraint Manager and/or the use of the Show Element command. Using an embedded route engine to evaluate complex timing constraints and interdependencies amongst signals shows the current status of a set of routed signals—a DDRx byte lane or a complete DDRx interface— via custom trace/connect line coloring; stipple patterns and customized data tip information to define the delay problem in the simplest terms possible.

With the embedded route engine, Timing Vision provides real-time feedback to the user during interactive editing and enhances the user’s ability to develop a strategy for resolving timing on large buses or interfaces such as DDRx, PCIe, etc. Coupled with Auto-interactive Phase Tuning (AiPT) and Auto-interactive Delay Tuning (AiDT) capabilities, users can accelerate the time to tune advanced interfaces like DDRx in one-third of the time it takes to do it manually using traditional methods.

Auto-interactive

Auto-interactive Breakout Technology (AiBT) improves user efficiency by allowing users to plan to break out on both ends. AiBT can be used with the new Split View and Bundle Sequence commands to dramatically shorten the time required to develop a high-quality and properly ordered breakout solution.

Differential pairs in an interface such as DDRx require designers to match static as well as dynamic phase. Matching phase for all differential pairs in an interface is a necessary first step before tuning and matching the rest of the signals. AiPT automatically matches the dynamic and static phases for the selected differential pairs. It works with a set of parameters that allows the user several options for trace lengthening or shortening, as well as pad entry/exit options. With AiPT, users can significantly shorten the time to match static and dynamic phases for differential pairs.

Delay tuning for signals for interfaces such as DDRx takes too much time when using traditional, manual methods. AiDT automatically generates tuning patterns on a user-selected routed byte lane or interface based on user-defined timing constraints and tuning parameters. AiDT computes the required length for the connections to meet timing constraints and utilizes controlled push/shove techniques when adding tuning patterns.

HDI Micro-via

The Allegro X Design Platform offers options for HDI and miniaturization from schematic to placement. An optimized 3D viewing engine enables micro-via placement and multi-board designs to be easy to parse, while integrated in-design analysis options from both PSpice and Sigrity technologies enable signal integrity simulations for optimal performance. The constraint manager within Allegro X carries miniaturization rules for the optimal form factor, via spacing, and pin spacing.

Specctra AutoRouter

Within the Allegro X Design Platform is the Specctra AutoRouter and its technological benefits, which work in tandem with the constraint manager system and robust DRC system to improve all aspects of component placement and routing.

In-Design analysis engines

Sigrity Aurora technology powers in-design analysis from schematic to production within the Allegro X Design Environment. Design teams have specialists working on the design at all stages of production: electrical engineers working on power integrity, signal experts working on component placement, and so on. With in-design analysis, the Allegro X Design Platform enables all team members equal, quick, and automated access to critical board success simulations such as impedance, crosstalk, reflection, and IR drop analysis without leaving your design.

3D Canvas

The Allegro X Design Platform has a vastly improved 3D engine and 3D canvas, with optimized performance for speed and accuracy of rendering, as well as memory management to ensure the best CPU performance. With model databases integrated within our greater data management and part information ecosystem, quick individual definitions and reverse-capable cutting plane generation, as well as advanced model formatting and a component collision wizard, the 3D canvas makes it easier than ever to hop into a design and see the visual output of your hard work.

Integration with PSpice and Microwave Office

Analysis is a vital part of the design process. Simulating in one tool, only to then create a schematic based on the simulation in a separate tool, not only duplicates effort, but the process also creates room for errors. The Allegro X Design Platform facilitates this flow by integrating with PSpice and AWR Microwave Office software.

RF analysis in Microwave Office software is not usually done by the same person responsible for either the schematic or the layout implementation on the board. This can lead to mistakes during the manual conversion process from the RF design to the PCB implementation. With the Allegro X Design Platform, RF structures created in Microwave Office software can be imported in seamlessly. This reduces the time for translation and potential errors.

With PSpice, the integration is even tighter. The simulation can be done right in the Allegro X Design Platform with the actual schematic to be designed. In this case, no design porting or re-entry is required. Any changes to the design due to analysis are immediately reflected in the schematic.

Integrated high-speed constraint manager

Constraints are critical to creating true design intent. The Allegro X Design Platform provides a simple, easy-to-use docked constraint manager to specify electrical constraints on a selected set of nets as they are created on the schematic canvas.

The Allegro X Design Platform provides full access to the Allegro Constraint Manager, which is used with the Allegro PCB Editor for PCB layout and routing. Having a single constraint manager prevents the misinterpretation of constraints between the front-end design creation process and the back-end PCB layout and routing process. This ability to specify electrical constraints enables a constraint-driven PCB design flow that shortens the overall design cycle and gets the design right the first time. Advanced features include automatically extracting, using, and overriding constraints from blocks added to the design.

The Allegro Constraint Manager presents constraints through several separate worksheets for different types of electrical constraints. It allows the capture, management, and validation of the different rules hierarchically. The Allegro Constraint Manager allows grouping all the high-speed constraints for a collection of signals to form an electrical constraint set (ECSet). This ECSet is then associated with all the nets in the group. As the rules are embedded in the design, the PCB layout designer can concentrate on optimizing the physical layout for size, routability, and manufacturability while the software automatically communicates compliance with the engineer’s performance requirements.

Manufacturing (DFM)

The Manufacturing Option’s DFM Checker module is designed for engineers and designers who appreciate the benefits of manufacturing analysis and want to conduct it in a robust environment with ease and sensibility at any phase of the PCB design process. The DFM Checker offers comprehensive analysis for all major PCB design tools, Gerber files, intelligent manufacturing files, and NC data to ensure the content supplied to the manufacturer will minimize costly delays. The Manufacturing Option’s Documentation Editor is a PCB documentation-authoring tool that intelligently automates your documentation creation process to produce complex PCB documentation in a fraction of the time versus traditional methods. The Documentation Editor lets you quickly create the manufacturing drawings that drive PCB fabrication and assembly. The Manufacturing Option’s Panel Editor module intelligently automates the complex process of panel definition and documentation, simplifying the design process. This solution enables designers to quickly create electronic manufacturing documents that clearly articulate the panel specification and instructions for the successful fabrication, assembly, and inspection of their designs.

A full suite of phototooling, bare-board fabrication, and test outputs, including Gerber 274x, NC drill, and bare-board test in a variety of formats, can be generated. More importantly, Cadence supports the industry initiative toward Gerber-less manufacturing by exporting and importing design data in IPC-2581 format. The IPC-2581 data is passed in a single file that creates accurate and reliable manufacturing data for high-quality manufacturing. Users can export a subset of the design data to protect their IP. The import of IPC-2581 is intended for overlaying artwork data on the design for viewing purposes only.

Centralized data

Over the years, data management requirements during the design process have led to ad-hoc solutions, such as simple emails, or the development of custom systems, workflows, and solutions, leading to increased errors due to miscommunication and increased time to complete the designs. Instead of storing data locally and interchanging files, which might stall design processes, and increase the probability of mistakes in the future, use the Allegro X Design Platform’s system for centralized data.

No more questions about who owns what file, whether a file is the latest version, or if a particular party has reviewed a particular change. Centralized data enables the procurement team, electrical engineers, and layout designers to source their work from and make changes to the same design data.

LiveBOM

Current processes make updating the bill of materials (BOM) at the end of a design painful. The Allegro X Design Platform introduces continuous updating of the BOM. Save time, reduce errors at the end of a project, and avoid redesigns caused by component unavailability.

Using our centralized data approach, electrical engineers, procurement, supply chain, and anyone else involved have visibility of the BOM without requiring interaction with the design engineer.

Team sharing

For optimal team productivity, it is common to have or at least want to have multiple team members working within the same schematic. The Allegro X Design Platform allows read/write permission management for specific sections of the schematic to avoid overwriting, conflict of changes, and inaccuracies. Partitioning a schematic like this enables the designs to proceed in parallel. Additionally, if sections or pages of the schematic are in review or need individual attention, you can lock individual pages for editing to prevent teammates from overwriting each other.

PLM interface

Product lifecycle management (PLM) is evergreen in its importance for optimizing designs moving forward. Connection and integration to industry-standard PLM software should not have to be manually completed by engineers. Instead, the Allegro X Design Platform enables a setup interface for quick and easy publishing.

Software products are complex, and training designers to use them correctly can require significant investment. System Capture’s intuitive PLM interface reduces the time required to get integrated with one of the most complex systems in modern corporations and allows them to spend more time doing what they’re good at—designing products.

Design data management

Designs include many files and other moving pieces. Keeping track of files modified for different versions of the board can be labor-intensive and error-prone. System Capture helps automatically maintain all the pieces involved and ensures design tracking.

Allegro Pulse

Allegro Pulse provides a complete solution to author, verify, manage, and use the CAD library. Librarians are provided with state-of-the-art authoring solutions that enable a fully curated ECAD library. The curation process ensures that each library element is accurate and complete, providing the appropriate models for each phase of the design process. This includes PCB footprints, schematic symbols, mechanical representations, supply chain and procurement information, and all relevant technical parametric information.

Allegro Pulse provides librarians with a unified environment, simplifying the creation and curation of the library to ensure the right parts are made available to the right people at the right times. Engineers and librarians can access a collaborative and configurable new part request (NPR) system, reducing the effort and turnaround time for new library models. A combined NPR dashboard is accessible from a browser or within the design tools to track the status of each part’s progress.

Find instead of search

Engineers must locate the best component to satisfy technical and business needs. Allegro Pulse’s unified search provides a modern, fully parametric search facility that reduces the time an engineer spends searching for components and IP. Engineers have a customizable view to sort and filter the complete CAD library. As many designs may require components not yet in the CAD library, a unified search provides access to multiple content providers, extending the search to billions of parts. Unified search is fully integrated with the Allegro Pulse NPR system; therefore, if a part is in a content provider, information from the content provider is downloaded and used to initiate the part request. Allegro Pulse transparently uses version control for the designs’ schematic and PCB layout.

Workflow automation

Allegro Pulse enables repeatable and traceable processes with a fully integrated workflow automation solution. Workflows can be created to drive specific portions of the design process, may include multiple participants, and may have phase/gate criteria to ensure proper adherence to a workflow. Workflows can be used to automate simple tasks for an individual or to manage the complexities of multiple people working on a design or project.

Enterprise collaboration

The electronic design process is a critical part of the overall product realization in a company and must be integrated into the overall lifecycle. Allegro Pulse provides out-of-the-box connectors for all the major PLM systems from Oracle/Agile, PTC Windchill, Siemens Teamcenter, Dassault 3DEXPERIENCE, and Dassault Systems 3DEXPERIENCE WORKS. Once connected to the PLM, engineers enjoy up-to-date part information supplied by the PLM system and the ability to update the PLM with the current BOM, 3D model data, and manufacturing deliverables with a single click.