Keeping Dry in a Rain of New Protocols Using Cadence Verification IP

The growing requirements for higher bandwidth, speed and lower power driving a new set of protocols such CXL, HBM3, PCIe 6, and many more, creating challenges for verification at the block level for compliance testing and at the SoC level for cache coherency assurance and performance testing.  In this webinar, we’ll review the latest protocols and present smart verification solutions that ensure the designs comply with the standard specifications as well as application-specific timing, power and performance metrics.