Marvell Gains High Confidence for Silicon Tapeout Using Palladium Emulator to Validate Processor

Marvell describes how they used industry-standard Ethernet virtual packet generation and analysis software with the Cadence® Palladium® emulator. Marvell leverages the multi-threaded technology with the Palladium platform to drive high-performance Ethernet traffic, stimulating their design-under-test in a pre-silicon verification environment. By validating the latency of their Ethernet packet processor (network switch) setting, they were able to gain high confidence prior to silicon tapeout.