iX34W7wMtq4vnKLwfJCBon
![](https://play.vidyard.com/iX34W7wMtq4vnKLwfJCBon.jpg)
Tackling Advanced Analog FinFET Back-end Layout
Nancee Tyler, Senior Principal Application Engineer at Cadence, talks about the transition to the FinFET Process, layout design challenges, and how Virtuoso® Design Platform can help.
Last Modified: August 3, 2023