Overview
Best-in-class DSC Verification IP addition for your DSI and DisplayPort IP design testing.
The Cadence® Verification IP (VIP) for Display Stream Compression (DSC) provides an ability to perform comprehensive verification of DSC-related features of display protocols. This product complements the Cadence VIP for MIPI DSI and VIP for DisplayPort and must be used with one of them. The Cadence VIP for DSC is compatible with all main verification languages (such as Verilog, SystemVerilog, e, VHDL, C, SystemC®, and Vera) and industry-standard methodologies (such as UVM, OVM, and VMM), and runs on all leading simulators. DSI VIP complements the Cadence VIP for MIPI DSI and VIP for DisplayPort.
Supported specification: VESA DSC 1.1, 1.2, and 1.2a.
Product Highlights
Key Features
The following table describes key features from the specifications that are implemented in the VIP:
Feature Name |
Description |
---|---|
DisplayPort |
|
DSC Version |
|
Configuration |
|
Framing and Compressed Stream Mapping |
|
Simulation Test Suite
VIP comes along with a testsuite of scenarios for easy VIP evaluation and deployment.
Please contact us for further information.
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