Overview
The Cadence® 112G-XSR SerDes PHY IP is a high-performance, low-latency PHY for die-to-die (D2D) and die-to-optical engine (D2OE) connectivities. The 112G-XSR SerDes utilizes PAM4 signaling and is designed to support interoperability with 112G-LR/MR/VSR SerDes.
Key Benefits
Interoperability
Interoperable with 112G-LR/MR/VSR
Maximize beach front bandwidth
Delivers up to 1Tbps/mm unidirectional bandwidth
Layout flexibility
Can be used as NS or EW for placement in any die edge