Use this education kit to teach how to use organic printed electronics process design kit (OPDK) to design circuits for integrated sensor platforms using the Cadence® Virtuoso® ADE Product Suite, Virtuoso Layout Suite, and Virtuoso Schematic Editor.

Kit specification

  • Summary: A set of three modules with lecture slides and lab exercises (in selected modules) ready for use in a typical one- to-two-week seminar or a full-day workshop (full syllabus below).
  • Modular and Flexible Use: Educators can choose the modules to teach—use all the modules in the Education Kit or only those most appropriate to your teaching outcomes. All provided materials are editable and can be easily adapted to an educator’s needs. 
  • Level: Beginner. Students are required to have a basic understanding of analog devices.

 

This Education Kit has been created in collaboration with BASF, Karlsruhe University of Technology, InnovationLabs, and the University of Heidelberg for the 2Horizons project, funded by the German Ministry of Education. The Open Source, production level OPDK used in this Education Kit can be downloaded.

All the software tools required for the practical part are available through the Cadence® University Program. To become a member of the Cadence University Program, please write to universityprogram@cadence.com for assistance.

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Course Aim

To explain to students the principles of analog design and layout using organic printed electronics technology.

Learning Outcomes

Knowledge and understanding of

  • Materials, processes, and modeling of organic printed electronics
  • Entering schematics and running basic simulations
  • Creating a simple layout, verifying, and running parasitic extraction
  • Differences between pre-layout and post-layout simulation results
  • Creation of more complex digital designs

Syllabus

No. Syllabus/th>
1 Introduction to Materials and Manufacturing Processes
2 Special Features of Printed Electronics Technology
3 Modeling Organic Transistors
4 Introduction to the EDA Tools and Front-to-Back Design Flow
5 Motivation: Large Area Active Matrix Sensor Platforms
6 Schematic and Pre-Layout Simulation
7 Layout Creation, Parasitic Extraction, and Post-Layout Simulation