Datasheet
MMIC Design with AWR Software
Simulation and design flow technologies that support MMIC product development
III-V semiconductor devices offer superior RF performance for mobile devices, communications infrastructure, and aerospace applications. Achieving optimal performance requires reliable circuit simulation, electromagnetic (EM) verification, communications testbenches, and a design flow that links electrical design to physical realization. Cadence AWR Design Environment software offers a leading front-to-back monolithic microwave integrated circuit (MMIC) design flow with an innovative user interface and complete integration of design entry, simulation, and physical design tools that enhances engineering productivity and ensures firstpass success.
Overview
MMIC Design Advantage
The AWR Design Environment platform offers the process design kits (PDKs), simulation technology, and design automation to accelerate MMIC development from concept to product, with the flexibility to tackle any design challenge.
Design wizards and project templates help designers ramp up their design starts quickly and take existing designs to the next level of performance.
Product Strengths
Design Management
Advanced report/measurement management enables designers to track multiple simulation results simultaneously, manage measurement data sources and parameters from a single location, and create sets of linked reports in a single dashboard display. Simplified power amplifier (PA) measurements provide easy plotting of nonlinear measurements such as gain compression or efficiency versus output power, a common method for presenting amplifier performance.
Simulation
Circuit-based annotations provide immediate simulation feedback for current density and critical voltages, pinpointing reliability issues long before layout. The unified database architecture dynamically links electrical and physical design for in-situ EM verification and manufacture-ready layout.
The Cadence AWR APLAC harmonic balance (HB) simulator combines linear and nonlinear frequency-domain simulation with time-domain transient simulation and is renowned for its speed and convergence on even the toughest of problems. It addresses highly nonlinear problems, networks with large active device counts, and MMICs operating under multi-tone conditions.
Design for Manufacturing
Design for manufacturing (DFM) is inherent in the AWR software platform, providing accurate modeling of process-specific metal traces and on-chip components from foundry-authorized PDKs. Export of GDSII layout files supports the transfer of design information into dedicated manufacturing tools.
PDKs developed in collaboration with leading MMIC foundries provide engineers using AWR Design Environment software with schematics, scalable layout parameterized cells (PCells), advanced layout utilities, and connectivity checking/highlighting, as well as accurate EM simulation featuring predefined substrate stackups and preconfigured simulation settings.
AWR software customers maximize profitability by reducing design failures. Yield and corner analysis within the software helps designers study statistical variations on circuit performance and optimize manufacturing yields by modifying the nominal values of specified parameters based on known process tolerances.
Features
Highlights
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Powerful design entry with process-specific models and layout PCells - Accurate, fast, and robust HB simulation
- PDKs for III-V semiconductor foundries
- Automated circuit extraction (ACE) technology for interconnect modeling
- Cadence AWR AXIEM EM simulator for design verification and parasitic extraction
- Cadence AWR Analyst EM simulator for analysis of bumps, bond wires and ribbons
- EM Socket for integration with third-party EM tools
- ERC, DRC, and LVS supports production-ready GDSII export
- System co-simulation for circuit envelope analysis and wireless standards verification