Use this education kit to teach the fundamentals of Application-Specific Standard Products (ASSP) on an example of Cadence® Tensilica® Processor IP, including how a microprocessor can be extended through optimized commands.

Kit specification

  • Summary: A set of five modules with lecture slides, demos, and lab exercises (in selected modules) is ready for use in a typical one- to two-week seminar or a full-day workshop (full syllabus below).
  • Modular and Flexible Use: Educators have the freedom to choose which modules to teach—use all the modules in the Education Kit or only those that are most appropriate to your teaching outcomes. All provided materials are editable and can be easily adapted for the educator’s needs.
  • Recordings: Videos can be used for self-study of the subject.
  • Level: Advanced. Students are required to have an understanding of digital electronics and the basics of hardware description language (Verilog) and C programming language.

 

All software tools required for the practical part are available through the Cadence Tensilica University Program. In order to become a member of the Tensilica University Program, please write to universityprogram@cadence.com for assistance.

Course aim

To explain to students the principles of ASSP and to show practical examples of how ASSPs can be extended and programmed using standard industry tools.

Learning outcomes

Knowledge and understanding of

  • What is an ASSP, why it is needed, and in which market segments it is used
  • How to run an algorithm on the model of an ASSP, profile it, and understand the performance limits
  • How to create a processor extension, address the performance limit, and verify the outcome
  • Various constructs and commands of the Tensilica Instruction Extension (TIE) language
  • Creation of RTL sources out of the ASSP model

Syllabus

1 Introduction to Tensilica IP
2 Introduction to TIE Language
3 TIE Language – Advanced Functions
4 Conversion of Processor Model into RTL
5 More Information on the Topic