Use this education kit to teach the fundamentals of digital implementation using the full Cadence digital flow.
Course Aim
To explain to students the principles of the full digital implementation flow.
Learning outcomes
Syllabus
1 | Introduction to Digital Chip Design Development Flow |
2 | Introduction to Logic Design, Creating Digital Design, Simulation of Digital Design |
3 | Introduction to Synthesis |
4 | Introduction to Timing |
5 | Introduction to Floorplanning |
6 | Introduction to Power Planning |
7 | Introduction to Placement |
8 | Introduction to Clock Tree Synthesis |
9 | Introduction to Routing |
10 | Introduction to Logic Equivalence Checking |
11 | Introduction to Parasitics and Delay Calculation |
12 | Introduction to Static Timing Analysis and Timing Optimization |
13 | Introduction to Signal Integrity |
14 | Introduction to Power Distribution and IR Drop and Electromigration |
15 | Introduction to Gate Level Simulation |
16 | Introduction to Density and Signoff-Checks and Chip finishing |
17 | Introduction to Low Power Design |
18 | Introduction to 3D-IC Design and AI Assisted Digital Implementation Flow |